Inside HP’s Nanotech Breakthrough
On Tuesday, HP made an announcement that quickly moved beyond the tech press to ripple through the mainstream media: Researchers Greg Snider and Stan Williams demonstrated a technique that they claim could speed advancements in modern computing by a factor of seven or eight. Working at Palo Alto’s famed HP Labs, the researchers merged traditional transistors with nanotechnology.
Transistors are integral parts of the chips that make up the brains of everything from the smallest cell phones to the largest mainframes. To make computers faster, researchers have long sought to reduce the size of transistors, shrinking them to pack more and more onto a chip.
Moore’s Law, named after Intel cofounder Gordon Moore, says the number of transistors packed on a chip will double every two years. In 1965, when Moore first made the claim, there were fewer than 100 transistors on the average chip. Today, Intel chips boast billions.
But chipmakers have been racing against Moore’s Law for decades, worried that one day they’ll stop finding ways to shrink components. At one point, they have said, Moore’s Law would crash into the laws of physics because transistors can only shrink so far.
Enter HP’s Snider and Williams, and a new approach.
Space in Between
Rather than shrink transistors, Snider and Williams sought to shrink the space between transistors, the “interconnects” that link one transistor to the next. On many chips, that space accounts for 80 percent to 90 percent of the chip’s real estate. Free it and you have more room for transistors at their current size.
And free that space is precisely what Snider and Williams propose to do. They suggest the use of nanowires — tiny filaments smaller than 90 atoms in width — that sit above the transistors, rather than on the same level.
HP’s technique is called a “field programmable…
